The present invention relates to a method of fabricating a semiconductor device, and more particularly, to a method of fabricating a recess gate.
As the size of patterns of semiconductor devices in DRAMs has decreased recently, a recess gate process has been introduced to overcome a short channel effect generated by the decreased channel length during a gate formation in a cell region and to improve a refresh characteristic. That is, a channel region is recessed in a certain depth to form a recess channel with a longer channel length. Typically, the recess gate process includes forming a recess channel by etching a recess channel region of a substrate and forming a gate on the recess channel. A bottom portion of the recess channel is generally formed in a ball shape.
FIG. 1A illustrates a cross-sectional view showing a typical recess gate process. Device isolation structures 12 are formed in a substrate 11. Recess channels 13 are formed in the substrate 11 by etching certain portions of the substrate 11. Individual recess channel 13 includes a neck pattern 13A and a ball pattern 13B. The recess channels 13 may be referred to as recess gate patterns.
A mixed plasma including tetrafluoromethane (CF4) and oxygen (O2) is generally used to form the ball patterns 13B of the recess channels 13 according to the typical method. However, when forming the ball pattern 13B according to the typical method, polymers formed on a chamber surface may cause a partial failure in forming the rounded shape of the ball patterns 13B. The failure may be generated by incongruity of an etching apparatus and plasma chemistry. Thus, limitations may be generated in characteristics of resultant products and reproducibility may be decreased.
FIG. 1B illustrates micrographic views showing limitations according to the typical method. Abnormally formed ball patterns (see ‘ABNORMAL’) do not have the desired size when compared to normally formed ball patterns (see ‘NORMAL’).